Morgan Stanley: CXMT yields drop to one-third as DUV costs rise
New capacity plans aim to boost global DRAM share to 16% by 2028 despite lower efficiency.
By Daniel Bernard ·

Morgan Stanley estimates that Chinese DRAM maker CXMT produces only about one-third as many bits per wafer as Western rivals. This efficiency gap stems from a reliance on older deep ultraviolet lithography equipment. Export controls have prevented ASML from selling its extreme ultraviolet machines to China, forcing manufacturers to use multiple patterning techniques on existing tools.
The shift away from EUV began as a necessity for logic chips. A 2023 teardown of the Huawei Mate 60 Pro revealed that SMIC produced the Kirin 9000S processor using a 7nm-class process without EUV. More recent analysis suggests SMIC has advanced its DUV-based process closer to 5nm density. However, Chris Mack, CTO of Fractilia, notes that while the technology is possible, the trade-offs involve higher defect rates and longer production times.
Mack explains that industry standards suggest three exposures on a 193 immersion tool cost roughly the same as one EUV exposure. At four masks, EUV becomes the more economical choice. Each additional pattern requires precise alignment, leading to accumulated errors. Designers often compensate by adding space around features, which enlarges the chip and reduces the number of dies per wafer. Mack stated, "You don't sell wafers, you sell die."
Memory manufacturers face similar constraints. Morgan Stanley described lithography access as a hard ceiling for Chinese memory development. CXMT is planning a move to 1-alpha DRAM, intended for HBM3e applications, which the bank believes is achievable without EUV. Douglas Fuller, a researcher at Copenhagen Business School, expects advanced packaging to allow DUV use for the latest DRAM generations by the end of the decade.
Micron previously developed its 1-alpha DRAM without EUV using tight process control. However, the company eventually adopted EUV for its 1-gamma DRAM, which offers more than 30% greater bit density per wafer than the previous generation. Mack said he would be hard pressed to believe a 3nm or 2nm node could be economically viable without EUV, though he noted that memory is easier to produce than logic chips.
Despite lower yields, Chinese chipmakers plan to expand capacity. Morgan Stanley projects that CXMT will increase its share of global DRAM bit supply from 14% in 2026 to 16% in 2028. The bank also expects China's AI chip self-sufficiency to rise from 42% in 2025 to 70% by 2030. This growth will rely on new greenfield capacity while accepting larger dies and longer manufacturing times.
Source: Tom's Hardware
More Business · Tech news · Scam Watch · Report a business · Got a Story?





